IF Sampling Subsystem Takes The Pain Out Of Basestation Receiver Design

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One of the trickiest parts of basestation design is the interface between the RF front end (low-noise amplifier, mixer, filter) and the intermediate frequency (IF) section where the analog-to-digital converter (ADC) resides. National Semiconductor’s SP16160CH1RB IF sampling receiver subsystem addresses this problem. Designed for Long-Term Evolution (LTE) and WiMAX basestations, it also works great in current WCDMA and GSM/EDGE systems.

Additionally, the SP16160CH1RB may be useful in the feedback receiver path in power amplifiers using the digital pre-distortion approach. Its reference design kit provides everything you need to design a high-performance receiver, including a reference design board, software, schematic, bill of materials, and Gerber files, shortening your design cycle.

The subsystem’s IF chain’s –105-dBm sensitivity means greater basestation capacity and coverage. It also has a carrier-to-noise (C/N) of 9 dB in a 200 kHz channel. The IF is 192 MHz. And, the input digitally controlled variable gain amplifier (DVGA) has a maximum gain of 22 dB.

The SP16160CH1RB IC packs the dual-channel ADC16DV160 16-bit, 160 Msample/s pipeline ADC, the dual-channel LMH6517 DVGA, and the LMK04031B clock jitter cleaner. The device’s overall performance is due to the high dynamic performance of the ADC, the low noise and high linearity of the DVGA, and the ultra-low rms jitter of the clock jitter cleaner.

The ADC16DV160 ADC provides a signal-to-noise ratio (SNR) of 76.3 dBFS and spurious-free dynamic range (SFDR) of 91.2 dBFS at 192-MHz input IF. The LMH6517 DGVA boasts a noise figure of 6 dB and output third-order intercept point (OIP3) of 45 dBm. The LMK04031B clock jitter cleaner delivers near 150 fs of rms clock jitter. The device runs on a single 5-V supply.

To simplify evaluation of the SP16160CH1RB, National’s WaveVision 5.1 data capture board and WaveVision 5 software enable data capture and analysis, as well as complete programmable configuration of the ADC16DV160 and LMH6517 via a common serial peripheral interface (SPI) bus. The SP16160CH1RB board includes a programmable interrupt controller (PIC) loader board for configuring the LMK04031B.

Available now, the SP16160CH1RB subsystem reference design kit costs $995.

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© 2010 Penton Media Inc.


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