ST-Ericsson Goes With Soitecís FD-SOI Technology
ST-Ericsson has chosen Soitecís planar fully-depleted silicon on insulator (FD-SOI) technology for use in its future mobile platforms. According to ST-Ericsson, the FD-SOI technology can deliver future benefits cost-effectively while allowing the company to differentiate its solutions. Soitecís FD-SOI wafers enable enhanced performance in ST-Ericssonís NovaThor smart-phone platform with 35% lower power consumption at maximum operation. Concerning fully depleted silicon, FD wafers are essentially an extremely thin layer of silicon over a buried oxide layer. Giving unique properties to transistors built in this layer, the wafers permit power savings up to 40% over traditional bulk CMOS at the same performance level. Depending on design optimizations, processors using fully depleted wafers experience performance boosts up to 60%. For more info on Soitecís markets and technologies, visit www.soitec.com/en/markets/consumer-and-mobile. For extra details about ST-Ericssonís offerings, go to www.stericsson.com/technologies/technologies.jsp.
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