Agilent Technologies Inc. has improved its core electronic design automation (EDA) frequency-domain simulation technology for fast and accurate simulation of highly non-linear circuits, such as digital dividers used in RFIC circuits. This simulation breakthrough provides circuit performance information that can help avoid design errors leading to an extra design turn. According to Agilent, each design turn adds as much as 60 to 90 days to the development cycle.
“With this technology breakthrough, we have extended the reach of harmonic balance simulation to highly non-linear circuits,” said Steve Chen, research and development manager with Agilent's EEsof EDA division. “In testing, we solve 90% of customer-supplied large and complex circuits, such as direct-conversion receivers, prescalers and complex LO generation networks. In the past, we solved roughly 50% of these types of circuits.”
Digital divider circuits are examples of highly non-linear circuits used as part of larger, mixed-signal and RF circuits, such as transceivers for cellular phones, for wireless communication devices such as WiFi, WiMAX and UWB, and for frequency generation of LO drives for frequency translation circuits or I/Q modulator/demodulators. In the past, these highly non-linear digital dividers and their attendant simulation problems prevented a complete chip simulation in mixed-signal and RF circuits. Now, these chip circuits simulate and converge quickly — shortening design cycles and, in many cases, eliminating an entire design turn, according to the developer.
This enhanced harmonic balance simulation technology is available as an update to the advanced design system (ADS) and RF design environment (RFDE) simulation software packages. Agilent ADS offers a complete set of system and circuit simulation technology and instrument links for RF and microwave design in a single, integrated flow. Agilent RFDE is an RF EDA software environment that tightly integrates leading RF simulation technologies from Agilent ADS into the cadence design system.
“Our ability to do both RF and divider simulations together, rather than doing each one separately, increases the likelihood of a successful chip fabrication for our customers and shortens development time,” said John Barr, product manager with Agilent's EEsof EDA division.
For more information, visit www.agilent.com/find/eesof-hb_breakthrough