Time & Frequency
1700-2700 MHz, 5 W amplifier
Telecom timing IC
Maxim Integrated Products' DS3104 provides full carrier-class clock synchronization for synchronous Ethernet (SyncE) line cards and mixed SONET/SDH/SyncE line cards. Maxim has applied DSP-based digital PLL (DPLL) technology in this line-card timing IC for next-generation telecom systems.
Key features include two independent DPLLs for bidirectional frequency conversion between Ethernet clock rates and SONET/SDH rates, and support for all 1G, 10G, and 100M Ethernet MII clock rates. Applications include line cards and other subsystems in a variety of wireline and wireless systems, including ADMs, digital cross-connects, carrier-class switches and routers, wireless base stations, DSLAMs and multiservice access nodes.
In SyncE, Ethernet links are synchronized by timing their bit clocks from high-quality, stratum-1-traceable clock signals in the same manner as SONET/SDH. The International Telecommunication Union (ITU) has outlined the SyncE concept in its Recommendation G.8261. The ITU standardized SyncE performance requirements in the G.8262 recommendation.
The DS3104 continually monitors up to eight input clocks. Built-in reference-selection logic automatically chooses the highest-priority, valid input clock for each of the two DPLLs. The main DPLL typically takes system clocks from dual-redundant timing cards, monitors both, selects one to which to lock, and synthesizes various clocks needed on the line card.
This main DPLL also provides the hitless switching and holdover capabilities needed on the line card. The second DPLL is used to convert recovered line clocks to suitable backplane line clocks, which are sent to the two system timing cards. Each DPLL is followed by a clock-multiplying, jitter-attenuating APLL and dividers that can provide an array of clock rates to the seven output clocks.
The DS3104 is available. The device has an SPI serial bus interface and is packaged in an 81-lead, 10 mm × 10 mm BGA. Prices start at $33.60 for 1000 pieces.
Maxim Integrated Products
Low-jitter clock generator
VMETRO's flexible high-frequency clock generator PMC/XMC module, the XCLK1, provides up to five phase-matched, low-jitter, sample clocks for high-speed ADCs at rates of up to 2 GHz per channel. The XCLK1 solves the problem of generating high-speed clock sources in a small, low-cost format suitable for high-performance embedded applications, such as SigInt, spectral analysis and RADAR.
The XCLK1 offers the choice of internal or external clock reference sources. The default clock source is an onboard 10 MHz TCXO. Local frequency multiplication based on this reference can generate output signals in the range of 500 MHz to 2 GHz, with a jitter of less than 0.5 ps. The output clock is available through five single-ended or three differential front-panel outputs. Alternatively, the XCLK1 can derive its outputs from an external source; either a front-panel RF (0 GHz to 2 GHz) input, 10 MHz front-panel reference or 10 MHz from its PMC user I/O connector.
When providing a clock source to multiple acquisition cards, users often need to synchronize the trigger, or start of acquisition for all cards, so that multiple samples are coherent. This is important for applications such as beamforming. The XCLK1 helps solve this problem by being able to momentarily halt all sample clock outputs using its trigger/reset input. This gives time for all acquisition cards to be reset and to start to capture data synchronously. Releasing all the clock outputs at once ensures that all data flows start together and are in step.
The XCLK1 is available in air- and conduction-cooled configurations.
Zarlink Semiconductor's integrated analog/digital PLLs meet all synchronous Ethernet timing requirements, including the latest recommendation from the International Telecommunications Union (ITU-T). The ITU-T G.8262 recommendation (former G.paclock) outlines the minimum performance requirements for timing devices used to synchronize networking equipment that uses synchronous Ethernet. The recommendation defines PLL performance characteristics, including wander, jitter, phase transients, clock bandwidth, frequency accuracy and holdover.
Synchronous Ethernet technology is being deployed in digital subscriber line access multiplexers (DSLAMs), routers, multiservice switching platforms (MSSPs), passive optical network (PON) and multiservice access equipment to enable voice, data, video and legacy services over a converged, high-bandwidth, synchronous Ethernet link.
Building on the ZL30107 and ZL30120 Gigabit Ethernet line card synchronizers, Zarlink is sampling its second-generation of multirate, 1 GbE and 10 GbE analog/digital PLL products supporting all Ethernet frequencies with the option to support independent transmit and receive timing paths. Zarlink's new synchronous Ethernet products support 1 GbE and 10 GbE frequencies or SONET/SDH frequencies. The devices also feature single-ended and differential outputs.
Integrated dual PLLs in one package support transmit and receive timing paths, allowing the devices to seamlessly convert backplane and PHY clocks. In the transmit path the products support rate conversion from standard telecom or Ethernet frequencies and provide jitter attenuation to generate a low-jitter Ethernet clock for the PHY. In the receive path the products rate convert the synchronous Ethernet recovered clocks to the backplane frequency, which then feeds back to the system timing card.
Ku-band frequency synthesizers
The HLX series of phase-locked oscillators and frequency synthesizers from EM Research are hermetically sealed, hybridized surface-mount products for use in military and other high-reliability ground-mobile, shipboard and airborne applications. The products are available as fixed-frequency or serially programmable frequency sources with outputs ranging from 50 MHz to more than 12.5 GHz. Temperature ranges between -40 °C to +85 °C. Packages are 0.81 in. × 0.81 in. × 0.15 in.
The ADF4113HV from Analog Devices is a PLL synthesizer with a high-voltage charge pump, which extends the power supply voltage up to 16.5 V. This extended voltage provides a wider tuning range for broadband frequency synthesis and is necessary for the design of products such as private mobile radios (PMR) and communications test equipment. With the ADF4113HV, a high-voltage VCO can be controlled directly through a passive loop filter, eliminating the need for active loop filters and as a result, reducing the bill of materials cost as well as noise and current consumption. The PLL joins Analog Devices' PLL synthesizer portfolio, which serves applications such as wireless base stations, mobile handsets/PDAs, broadband wireless access, industrial and instrumentation, test equipment, and satellite equipment.
Clock generator family
Texas Instruments' family of highly programmable, one-to-four PLL clock generator devices have the ability to generate up to nine output clock sources from a single input frequency. Each output can be programmed in-system for any clock frequency up to 230 MHz.
The CDCE9xx and CDCEL9xx family of clock generators ranges from one to four PLLs with very low jitter at 60 ps typical. The CDCE9xx devices provide 2.5 V or 3.3 V outputs, and the CDCEL9xx provides 1.8 V outputs, enabling the low-power capability needed for portable devices. Each PLL supports spread-spectrum clocking (SSC) to reduce electromagnetic interference (EMI) to enable compliance with EMC regulations.
The family provides programmability options including the ability to program and customize the devices in-system through I2C and EEPROM. By offering footprint compatibility across the family, designers can adapt the system design without changing hardware, which reduces cost and enables the designer to simply increase or decrease the number of clock outputs. The new family of devices further simplifies system design by replacing a number of components in the system, including crystals, oscillators, buffers and PLLs.
The clock devices are optimized to work with TI's DaVinci-based processors by generating any audio, video, processor or interface clock to drive the digital processor, audio DAC or codec and Ethernet or USB controller. The on-chip VCXO allows frequency synchronization of different datastreams.
TI provides a selection of timing support devices, PLL-based and non-PLL-based, to support consumer, communications and memory applications.
The CDCE949 is available in a 24-pin TSSOP package. The remaining devices in the family will be available throughout 2007 in 20-pin, 16-pin and 14-pin TSSOP packages. Prices range from $1.60 to $2.20, depending on model.
PCI Express clock buffers
Pericom Semiconductor's zero-delay PCIe Gen2 clock buffer family provides reference clocks for serial connectivity at 5.0 Gbps and meets the reference clock requirements of fully buffered DIMM (FBDIMM) memory modules for workstation and server applications. These clock buffers are designed to support Intel Xeon dual-core processor workstation and server applications with as few as four or as many as 19 PCIe outputs provided by a single IC. Additionally, stringent PCIe Gen2 (5.0 Gbps) reference clock jitter requirements are surpassed. This has been validated by independent testing at a tier 1 CPU chipset vendor laboratory. Testing concluded that the PI6C20800S outperformed competitive products in the critical ‘additive jitter’ test, providing less than 1.0 ps of additive rms jitter. This benefit enables server platform designers to meet their Gen2 platform jitter budgets with margin for production manufacturing.
The PI6C20400S has four differential outputs, and the PI6C20800S has eight differential outputs, each with one spread-spectrum-compatible PLL. The PI6C21900 (18+1) and PI6C21900S (17+2) each offer 19 total differential outputs, using two spread-spectrum-compatible PLLs, providing the designer with two separate frequency domains for FBDIMM and PCIe applications.
The PCIe Gen2 (5.0 Gbps) clock buffer family joins the PCIe Gen2 signal-switch and clock-oscillator product offerings in Pericom's PCI Express solution portfolio. The entire Gen2 5 Gbs clock buffer family is available in production quantities.
Pricing in 5000-unit quantities is $1.35 each for the PI6C20400S, $1.50 each for the PI6C20800S, and $4.50 each for the PI6C21900 and PI6C21900S.
Rubidium frequency standard
The RFS10E from Precision Test Systems is a 10 MHz rubidium frequency standard with many options. An optional input allows the RFS10E to be locked to a 1 pps signal, such as GPS. Also, the 1 pps output derived from the rubidium will align itself in time to the 1 pps input to within 150 ns.
A rubidium oscillator is the main frequency reference. The unit features five sine wave outputs as standard, and five additional outputs available as option 05. Phase noise is -128 dBc/Hz at 100 Hz offset. The unit has optional dual outputs of 5 MHz and 10 MHz, and an optional programmable square wave output. Two units can be operated in redundancy and setup for added security with automatic switchover.
Precision Test Systems
Phase-locked Tx/Rx system
Virginia Diodes has developed a compact 790 GHz to 840 GHz phase-locked transmit and receive system using PC-controlled 10 GHz to 14 GHz synthesizers. Approximately 0.2 mW of RF output power is achieved with Tx. The receiver conversion loss is 15 dB DSB (includes LNA). Rx and Tx are phase-locked to a common 10 MHz Xtal oscillator. The transmitter output power at 790 GHz to 840 GHz can be modulated using a TTL modulation control input. PC software for Tx, Rx and frequency-control is included.
Stratum-III stabile OCXO
Bliley Technologies' NV45Q ovenized crystal oscillator (OCXO) series features a combination of Stratum-III stability performance, low jitter and low-profile packaging. The OCXO is surface-mountable, whereas oscillators in this product category often require soldering via a separate manufacturing process.
An overview of product specifications includes frequencies ranging from 10 MHz to 32 MHz; 3.3 V and 5.0 V supply options; phase noise (typical) of -145 dBc at 100 Hz offset; LVCMOS and HCMOS output options; low-profile packaging (0.31 in. maximum); and up to -40 8C to +85 8C operating temperature range.
Want to use this article? Click here for options!
© 2013 Penton Media Inc.
Acceptable Use Policy blog comments powered by Disqus
Most Popular Stories
CTIA Wireless IT & Entertainment 2010
Read the latest from the show...