Advanced memory supplier Samsung Electronics Co., Ltd. has improved its process to enable production of 16-chip multi-chip package (MCP) of memories. The new MCP technology supports the industry-wide demand for small form factors and high densities that will accommodate multimedia-intensive user applications. Samsung's new 16-chip MCP technology, when applied to 8 Gb NAND flash chips, can enable up to a 16 gigabyte (GB) MCP solution, said the maker.

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Advanced MCP technology requires a combination of key processes such as wafer thinning technology, redistribution layer technology, chip sawing technology and wire bonding technology. To increase the number of chips stacked vertically, the need for further wafer thinning was a critical design obstacle. For the new 16-chip process, Samsung introduced wafer-thinning technology that eliminates 24 over 25 (24/25) of the thickness of each fabricated wafer to reduce the overall thickness to only 30-microns (μm). This is just 65% the thickness of the 10-chip MCP wafer (45 μm­) Samsung developed in 2005, which measures 20 to 30 microns.

As part of its MCP breakthrough, Samsung also developed a new laser-cutting technology to cut the wafer into individual chips. This new cutting process prevents the memory chips from breaking into pieces when they are cut using conventional blade sawing technology, which was originally designed only for sawing wafers up to 80 microns thick.

To vertically stack identically sized dies, a redistribution layer technology also is applied in Samsung's new multi-stack MCP process, to enable wafer fabricators to adhere the wire contacts from just one side, unlike the conventional method of extending wire connection from both sides of each chip. Along with a single wire contact per die, the dies are placed in a zigzag stack to minimize the use of space and the length of the wire connectors. Moreover, the thickness of the adhesive has been reduced to 20 microns bringing the height of a16-die stack to 1.4 mm. (A 10-chip MCP uses a 60-micron adhesive layer and has a total height of 1.6 mm.

Section diagram of conventional MCP and new 16-Chip