High IF sampling 12-bit ADC consumes considerably low power

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To offer an upgrade path to higher sampling rates with considerably low power dissipation, Linear Technology has readied a 12-bit 250 Msps high IF sampling analog-to-digital converter (ADC) that offers a 1.2 GHz analog input bandwidth along with the lowest power consumption in its class. Designed for digitizing high-frequency, wide dynamic range signals, it is aimed at wired and wireless broadband communications applications. Its ac performance includes 65.3 dB signal-to-noise ratio (SNR) and 80 dB spurious-free dynamic range (SFDR) for signals up to 140 MHz. Ultralow jitter of 95 fsRMS allows IF undersampling with excellent noise performance, according to the maker. Dc specs include ±1.0 LSB INL (typical), ±0.4 LSB DNL (typical) and no missing codes over temperature. Plus, it can be driven with an analog input range of 2 Vp-p. In fact, this high IF sampling ADC offers selectable input of 1 Vp-p or 2 Vp-p.

Operating on a 2.5 V supply, the LTC2242-12 consumes just 740 mW. It is part of a pin-compatible family of 10-bit and 12-bit ADCs, sampling at 170 Msps, 210 Msps and 250 Msps. It is pin-compatible with the existing 3.3 V LTC2220 family. Along with improved power efficiency, the low power dissipation reduces time and costs spent on thermal design considerations and helps improve long-term product reliability.

Its digital outputs can be either differential LVDS, or single-ended CMOS. Three format options are available for the CMOS outputs: a single bus running at the full data rate or two demultiplexed buses running at half data rate with either interleaved or simultaneous update. A separate output power supply allows the CMOS output swing to range from 0.5 V to 2.625 V. The ENC+ and ENC — inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance over a wide range of clock duty cycles.

There is flexibility to select between LVDS, full-rate CMOS or demultiplexed CMOS outputs for easy interface to DDCs. The digital output supply can be powered from 0.5 V-2.6 V, allowing direct connection to low-voltage digital interfaces. The LTC2242-12 low-power family is available in a small 9 mm x 9 mm QFN package, and includes integrated bypass capacitance that further reduces the overall solution size. Additionally, these high-speed ADCs are also available in optional lead-free packages for RoHS compliance.

The LTC2242-12 family is supported with LVDS demo boards for quick device evaluation. Sampling now with production to start in May. Available in commercial and industrial temperature grades, they are priced at $59 each in 1,000-piece quantities.
Linear Technology Corp.
(408) 432-1900

www.linear.com

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