The use of IEEE 1588-2008 Precision Time Protocol (PTP) in wireless networks to transport synchronization is growing. This has an added significance in deployments involving packet backhauls such as Long-Term Evolution (LTE), LTE-Advanced (LTE-A), and some of the WCDMA deployments.

The advances in the physical-layer (PHY) technology, ever-reducing guard periods on the radio interface, and shrinking cell sizes pose very stringent requirements on synchronization accuracies for efficient operation of wireless basestation nodes. Timestamp accuracy and network packet delay variation (PDV) compensation form the basis of the achievable accuracy.

With their superior ability to deliver quality of service (QoS) that meets network service level agreements (SLAs), multicore communication processors (MCPs) perform traffic aggregation and a variety of transport protocol offloads. These features make MCPs highly popular for implementing the network stack protocols on the basestations.

This article describes the high-precision timestamp architecture of a slave wireless basestation node. The timestamp logic (TSL) is based on a hardware timestamp capture logic (TCL), a PTP agnostic, and nonpacket modifying hardware. The node is implemented on a traffic-aggregating MCP.

Introduction

All nodes in a wireless communication network need to be syntonized or synchronized to support basic operation.1, 2 Node syntonization refers to the estimation and compensation of frequency differences between two nodes. Node synchronization refers to the estimation and compensation of timing differences between the two nodes.

Frequency division duplex (FDD) nodes and time division duplex (TDD) nodes have different requirements for the accuracy of the estimation of timing differences and for the necessity to compensate for these differences. TDD nodes have the more stringent requirements involving phase or time alignment with adjacent nodes.

The functional partitioning among various nodes in the wireless networks and the timing requirements vary, depending on the services associated with the synchronization. For example, TDD basestations require synchronization both to minimize adjacent cell interference handover interworking and for transmit diversity, while RNC-NodeB synchronization is required to keep the radio network controller (RNC) aware of the timing on the NodeB.

With each passing generation of PHY technologies in the wireless world, synchronization needs are becoming more stringent. The current requirements on a TDD LTE eNB are ±50 ppb for frequency estimation and 2.5 ms for time estimation relative to Universal Time Coordinated (UTC).

Mobile networks are seeing an unprecedented explosion in the bandwidth needs. With ultrahigh bandwidth needs and the deployment of all-IP (Internet Protocol) transport standards such as LTE, cost-efficient backhaul topology designs are driving toward all-packet networks in the wireless domain. IEEE 1588-2008 is widely used to achieve frequency and time synchronization in the 3GPP network nodes.

Reference 3 outlines the mechanism to achieve synchronization. Changes in delay based on time-of-day (ToD) loading conditions and network asymmetry can cause time offsets that can be problematic to services requiring absolute time.

The processing variations inside the intermediate network nodes such as switches and routers also pose a burden on the achievable accuracies of the synchronization. This is addressed by the implementation of transparent clock services embedded in network nodes.

Figure 1 illustrates a synchronization topology in a 3G radio access network (RAN) with network assist, i.e., transparent clocks (TCs). The GPS receiver serves as a primary reference clock and uses the IEEE 1588 protocol to distribute the traceable clock to all nodes in the network.

MCPs In Basesations

Sophisticated MCPs are used for high-performance wireless transport applications today. An ideal communication processor for this application includes special-purpose hardware that provides:

• Protocol classification engines
• Packet inspection
• Sophisticated traffic management
• Integrated security processors
• Encapsulation/de-capsulation assists
• Fragmentation and reassembly
• Low-overhead multiplexing and de-multiplexing
• Cyclic redundancy checking (CRC) and checksum offload for a variety of protocol headers and payloads

In addition to being suited for classic basestation transport applications, communication processors typically perform traffic aggregation from multiple sources and provide them with network transport stack functionality. A classic example of its usage is a multimode wireless basestation, where traffic from radio networks of multiple technologies is aggregated. MCPs typically have embedded CPUs for configuration and management plane processing.

The increasing complexity and throughput requirements for wireless domain access-specific processing require MCP-like architectures to offload generic protocol functionality, such as an IP network stack (e.g., IPv4/IPv6/IPsec, UDP, Ethernet). Also, the aggregation architecture and the shared backhaul resources demand very sophisticated traffic management assist, as provided by MCPs. To cost-effectively implement a wireless basestation on an MCP architecture, the MCP must also provide a high-accuracy TSL to enable PTP applications to achieve the best possible synchronization performance.

The MCP-based architecture also can classify messages per end-to-end flow and provide a post office dispatcher-like functionality, assisted by hardware, by directing the message toward the appropriate context in the application layer.

This capability is useful in hub basestations operating as masters, grandmasters, TCs, or ordinary clocks in the packet network. The architecture presented here in conjunction with application on the core (CPU), CP programmable software, and TCL hardware will achieve a high-accuracy timestamping performance.

Timestamping Architectures

Inherent in the use of IEEE 1588 to support the synchronization requirements of wireless basestations is the ability to preserve the accuracy of the timestamps at both the point of generation (at the master port) and at the point of recovery (at the slave port). Any errors incurred by the timestamping process at either of these points result in an uncorrectable error in the slave node’s timing recovery process.

At a slave node, the error of an egress timestamp is defined as the difference between the local real-time clock (RTC) used to generate the timestamp and the time at which the first bit of the timestamp packet is transmitted on the physical interface.

Similarly, the error in an ingress timestamp is the difference between the time that the first bit of the timestamp packet arrives from the physical interface and the time the timestamp is actually processed by the PTP client. In general, the error is minimized as the TSL moves closer to the PHY transmission instance.

The industry employs many different timestamping paradigms, each targeted at achieving different levels of accuracy: application-layer timestamping, driver-based or firmware-based, and dedicated hardware between the media access controller (MAC) and the PHY (Fig. 2).

Timestamping on the dedicated hardware between the MAC and PHY provides the best accuracy among all the paradigms, and it is the best suited for evolving wireless technologies. However, it requires highly sophisticated hardware with the ability to perform packet classification with all variants of transport, network, and link layers exercised for PTP (UDP, IPv4, IPv6, and flavors of Ethernet, e.g., VLAN aware).

The hardware must be able to perform packet modification, recompute all relevant checksums, and update headers in real time. In short, dedicated hardware-based TSL requires a partial implementation of the protocol stack on the hardware and is inflexible toward evolution in the protocol. The proposed architecture overcomes these restrictions.